Struct Device

pub struct Device<I> { /* private fields */ }

Root block of the Device driver

Implementations

impl<I> Device<I>

pub const fn new(interface: I) -> Self

Create a new instance of the block based on device interface

pub fn read_all_registers( &mut self, callback: impl FnMut(u8, &'static str, FieldSetValue), ) -> Result<(), I::Error>

where I: RegisterInterface<AddressType = u8>,

Read all readable register values in this block from the device. The callback is called for each of them. Any registers in child blocks are not included.

The callback has three arguments:

• The address of the register
• The name of the register (with index for repeated registers)
• The read value from the register

This is useful for e.g. debug printing all values. The given field_sets::FieldSetValue has a Debug and Format implementation that forwards to the concrete type the lies within so it can be printed without matching on it.

pub async fn read_all_registers_async( &mut self, callback: impl FnMut(u8, &'static str, FieldSetValue), ) -> Result<(), I::Error>

where I: AsyncRegisterInterface<AddressType = u8>,

Read all readable register values in this block from the device. The callback is called for each of them. Any registers in child blocks are not included.

The callback has three arguments:

• The address of the register
• The name of the register (with index for repeated registers)
• The read value from the register

This is useful for e.g. debug printing all values. The given field_sets::FieldSetValue has a Debug and Format implementation that forwards to the concrete type the lies within so it can be printed without matching on it.

pub fn counter_configuration( &mut self, ) -> RegisterOperation<'_, I, u8, CounterConfiguration, RW>

Counter configuration The iC-MD can be configured for 1 up to 3 channels with counter lengths of 16 to 48 bits. Here, the counter configuration is selected as a u8 value. The higher-level driver takes care of converting from a meaningful configuration to the 8-bit value.

pub fn read_cnt_cfg_0( &mut self, ) -> RegisterOperation<'_, I, u8, ReadCntCfg0, RO>

Read the 24 bit counter configuration, 24+2 bits to read (4 bytes) This corresponds to counter configuration 0b000.

pub fn read_cnt_cfg_1( &mut self, ) -> RegisterOperation<'_, I, u8, ReadCntCfg1, RO>

Read the 24 bit, 2 counters configuration, 48+2 bits to read (7 bytes) This corresponds to counter configuration 0b001.

pub fn read_cnt_cfg_2( &mut self, ) -> RegisterOperation<'_, I, u8, ReadCntCfg2, RO>

Read the 48 bit counter register, 48+2 bits to read (7 bytes) This corresponds to counter configuration 0b010.

pub fn read_cnt_cfg_3( &mut self, ) -> RegisterOperation<'_, I, u8, ReadCntCfg3, RO>

Read the 16 bit counter configuration, 16+2 bits to read (3 bytes) This corresponds to counter configuration 0b011.

pub fn read_cnt_cfg_4( &mut self, ) -> RegisterOperation<'_, I, u8, ReadCntCfg4, RO>

Read the 32 bit counter configuration, 32+2 bits to read (5 bytes) This corresponds to counter configuration 0b100.

pub fn read_cnt_cfg_5( &mut self, ) -> RegisterOperation<'_, I, u8, ReadCntCfg5, RO>

Read the 32 bit and 16 bit counter configuration, 32+16+2 bits to read (7 bytes) This corresponds to counter configuration 0b101.

pub fn read_cnt_cfg_6( &mut self, ) -> RegisterOperation<'_, I, u8, ReadCntCfg6, RO>

Read the 16 bit and 16 bit counter configuration, 16+16+2 bits to read (5 bytes) This corresponds to counter configuration 0b110.

pub fn read_cnt_cfg_7( &mut self, ) -> RegisterOperation<'_, I, u8, ReadCntCfg7, RO>

Read the 3 x 16 bit counter configuration, 16+16+16+2 bits to read (7 bytes) This corresponds to counter configuration 0b111.

pub fn reference_counter( &mut self, ) -> RegisterOperation<'_, I, u8, ReferenceCounter, RO>

Read the references registers 24 bits. TODO: It is unclear if this works, as I assume the address for reading is auto-incremented as when reading the data. This should be tested once the actual hardware setup is available with an encoder connected.

pub fn instruction_byte( &mut self, ) -> RegisterOperation<'_, I, u8, InstructionByte, WO>

Instruction byte (write only) Allows writing of the instruction bytes. When one of these bits is set to 1, the corresponding instruction is executed and the bit set back to zero, except in the case of Act0 and Act1, which remain set to the written value.

pub fn status_0(&mut self) -> RegisterOperation<'_, I, u8, Status0, RO>

Status0: Status of counter 0 Returns the status of counter 0 plus several other status bits. See also Status1 and Status2 for the other counters and more status bits.

pub fn status_1(&mut self) -> RegisterOperation<'_, I, u8, Status1, RO>

Status1: Status of counter 1 Returns the status of counter 1 plus several other status bits. See also Status0 and Status2 for the other counters and more status bits.

pub fn status_2(&mut self) -> RegisterOperation<'_, I, u8, Status2, RO>

Status2: Status of counter 2 Returns the status of counter 2 plus several other status bits. See also Status0 and Status1 for the other counters and more status bits.

Trait Implementations

impl<I: Debug> Debug for Device<I>

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.